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Volume 32, Issue 6, Jun 2011


  • Approximate Graphic Method for Solving Fermi Level and Majority Carrier Density of Semiconductors with Multiple Donors and Multiple Acceptors

    Ken K. Chin

    J. Semicond.  2011, 32(6): 062001

    doi: 10.1088/1674-4926/32/6/062001

    Abstract PDF Get Citation

    In this work we present a generic approximate graphic method for determining the equilibrium Fermi level and majority carrier density of a semiconductor with multiple donors and multiple acceptors compensating each other. Simple and easy-to-follow procedures of the graphic method are described. By graphically plotting two wrapping step functions facing each other, one for the positive hole-acceptor and one for the negative electron-acceptor, we have the crossing point that renders the Fermi level and majority carrier density. Using the graphic method, new equations are derived, such as the carrier compensation proportional to NA/ND, not the widely quoted NA – ND. Visual insight is offered to view not only the result of graphic determination of Fermi level and majority carrier density, but also the dominant and critical pair of donors and acceptors in compensation. The graphic method presented in the work will help guide the design, adjustment, and improvement of the multiply doped semiconductors. Comparison of this approximate graphic method with previous work on compensation, and with some experimental results is made. Future work in the field is proposed.

  • Transmission line model of carbon nanotubes: through the Boltzmann transport equation

    Fang Zhou

    J. Semicond.  2011, 32(6): 062002

    doi: 10.1088/1674-4926/32/6/062002

    Abstract PDF Get Citation

    A transmission line (TL) model of a carbon nanotube (CNT) is analyzed through the Boltzmann transport equation (BTE). With the help of a numerical solution of the BTE, we study the kinetic inductance (LK), quantum capacitance (CQ) and resistivity (RS) of a CNT under a high frequency electric field. Values of LK and CQ obtained from BTE accord with the theoretical values, and the TL model is verified by transport theory for the first time. Moreover, our results show that the AC resistivity of CNTs deviates from DC, increasing along with shorter electric field wave length. This shows that changes in RS in the high frequency condition must be considered in the TL model.

  • Bound polaron in a strained wurtzite GaN/AlxGa1-xN cylindrical quantum dot

    Zhang Bin, Yan Zuwei, Zhang Min

    J. Semicond.  2011, 32(6): 062003

    doi: 10.1088/1674-4926/32/6/062003

    Abstract PDF Get Citation

    Within the effective-mass approximation, a variational method is adopted to investigate the polaron effect in a strained GaN/AlxGa1-xN cylindrical quantum dot. The electron couples with both branches of longitudinal optical-like (LO-like) and transverse optical-like (TO-like) phonons and the built-in electric field are taken into account. The numerical results show that the binding energy of the bound polaron is reduced obviously by the polaron effect on the impurity states. Furthermore, the contribution of LO-like phonons to the binding energy is dominant, and the anisotropic angle and Al content influence on the binding energy are small.


  • Multi-wafer 3C-SiC thin films grown on Si (100) in a vertical HWLPCVD reactor

    Yan Guoguo, Sun Guosheng, Wu Hailei, Wang Lei, Zhao Wanshun, Liu Xingfang, Zeng Yiping, Wen Jialiang

    J. Semicond.  2011, 32(6): 063001

    doi: 10.1088/1674-4926/32/6/063001

    Abstract PDF Get Citation

    We report the latest results of the 3C-SiC layer growth on Si (100) substrates by employing a novel home-made horizontal hot wall low pressure chemical vapour deposition (HWLPCVD) system with a rotating susceptor that was designed to support up to three 50 mm-diameter wafers. 3C-SiC film properties of the intra-wafer and the wafer-to-wafer, including crystalline morphologies and electronics, are characterized systematically. Intra-wafer layer thickness and sheet resistance uniformity (σ/mean) of ~3.40% and ~5.37% have been achieved in the 3 × 50 mm configuration. Within a run, the deviations of wafer-to-wafer thickness and sheet resistance are less than 4% and 4.24%, respectively.

  • Study of hybrid orientation structure wafer

    Tan Kaizhou, Zhang Jing, Xu Shiliu, Zhang Zhengfan, Yang Yonghui, Chen Jun, Liang Tao

    J. Semicond.  2011, 32(6): 063002

    doi: 10.1088/1674-4926/32/6/063002

    Abstract PDF Get Citation

    Two types of 5 μm thick hybrid orientation structure wafers, which were integrated by (110) or (100) orientation silicon wafers as the substrate, have been investigated for 15–40 V voltage ICs and MEMS sensor applications. They have been obtained mainly by SOI wafer bonding and a non-selective epitaxy technique, and have been presented in China for the first time. The thickness of BOX SiO2 buried in wafer is 220 nm. It has been found that the quality of hybrid orientation structure with (100) wafer substrate is better than that with (110) wafer substrate by "Sirtl defect etching of HOSW".


  • Fabrication and characterization of high performance AlGaN/GaN HEMTs on sapphire with silicon nitride passivation

    Zhang Renping, Yan Wei, Wang Xiaoliang, Yang Fuhua

    J. Semicond.  2011, 32(6): 064001

    doi: 10.1088/1674-4926/32/6/064001

    Abstract PDF Get Citation

    AlGaN/GaN high electron mobility transistors (HEMTs) with high performance were fabricated and characterized. A variety of techniques were used to improve device performance, such as AlN interlayer, silicon nitride passivation, high aspect ratio T-shaped gate, low resistance ohmic contact and short drain–source distance. DC and RF performances of as-fabricated HEMTs were characterized by utilizing a semiconductor characterization system and a vector network analyzer, respectively. As-fabricated devices exhibited a maximum drain current density of 1.41 A/mm and a maximum peak extrinsic transconductance of 317 mS/mm. The obtained current density is larger than those reported in the literature to date, implemented with a domestic wafer and processes. Furthermore, a unity current gain cut-off frequency of 74.3 GHz and a maximum oscillation frequency of 112.4 GHz were obtained on a device with an 80 nm gate length.

  • A sub-circuit MOSFET model with a wide temperature range including cryogenic temperature

    Jia Kan, Sun Weifeng, Shi Longxing

    J. Semicond.  2011, 32(6): 064002

    doi: 10.1088/1674-4926/32/6/064002

    Abstract PDF Get Citation

    A sub-circuit SPICE model of a MOSFET for low temperature operation is presented. Two resistors are introduced for the freeze-out effect, and the explicit behavioral models are developed for them. The model can be used in a wide temperature range covering both cryogenic temperature and regular temperatures.

  • Fabrication and characteristics of a 4H-SiC junction barrier Schottky diode

    Chen Fengping, Zhang Yuming, Lü Hongliang, Zhang Yimen, Guo Hui, Guo Xin

    J. Semicond.  2011, 32(6): 064003

    doi: 10.1088/1674-4926/32/6/064003

    Abstract PDF Get Citation

    4H-SiC junction barrier Schottky (JBS) diodes with four kinds of design have been fabricated and characterized using two different processes in which one is fabricated by making the P-type ohmic contact of the anode independently, and the other is processed by depositing a Schottky metal multi-layer on the whole anode. The reverse performances are compared to find the influences of these factors. The results show that JBS diodes with field guard rings have a lower reverse current density and a higher breakdown voltage, and with independent P-type ohmic contact manufacturing, the reverse performance of 4H-SiC JBS diodes can be improved effectively. Furthermore, the P-type ohmic contact is studied in this work.

  • Gate length dependence of the shallow trench isolation leakage current in an irradiated deep submicron NMOSFET

    Liu Zhangli, Hu Zhiyuan, Zhang Zhengxuan, Shao Hua, Chen Ming, Bi Dawei, Ning Bingxu, Zou Shichang

    J. Semicond.  2011, 32(6): 064004

    doi: 10.1088/1674-4926/32/6/064004

    Abstract PDF Get Citation

    The effects of gamma irradiation on the shallow trench isolation (STI) leakage currents in a 0.18 μm technology are investigated. NMOSFETs with different gate lengths are irradiated at several dose levels. The threshold voltage shift is negligible in all of the devices due to the very thin oxide thickness. However, an increase in the off-state leakage current is observed for all of the devices. We believe that the leakage is induced by the drain-to-source leakage path along the STI sidewall, which is formed by the positive trapped charge in the STI oxide. Also, we found that the leakage is dependent on the device's gate length. The three-transistor model (one main transistor with two parasitic transistors) can provide us with a brief understanding of the dependence on gate length.

  • Characterization of a room temperature terahertz detector based on a GaN/AlGaN HEMT

    Zhou Yu, Sun Jiandong, Sun Yunfei, Zhang Zhipeng, Lin Wenkui, Liu Hongxin, Zeng Chunhong, Lu Min, Cai Yong, Wu Dongmin, Lou Shitao, Qin Hua, Zhang Baoshun

    J. Semicond.  2011, 32(6): 064005

    doi: 10.1088/1674-4926/32/6/064005

    Abstract PDF Get Citation

    We report on the characterization of a room temperature terahertz detector based on a GaN/AlGaN high electron mobility transistor integrated with three patch antennas. Experimental results prove that both horizontal and perpendicular electric fields are induced in the electron channel. A photocurrent is generated when the electron channel is strongly modulated by the gate voltage. Despite the large channel length and gate-source/drain distance, significant horizontal and perpendicular fields are achieved. The device is well described by the self-mixing of terahertz fields in the electron channel. The noise-equivalent power and responsivity are estimated to be 100 √Hz and 3 mA/W at 292 K, respectively. No decrease in responsivity is observed up to a modulation frequency of 5 kHz. The detector performance can be further improved by engineering the source-gate-drain geometry to enhance the nonlinearity.

  • Double humps and radiation effects of SOI NMOSFET

    Cui Jiangwei, Yu Xuefeng, Ren Diyuan, He Chengfa, Gao Bo, Li Ming, Lu Jian

    J. Semicond.  2011, 32(6): 064006

    doi: 10.1088/1674-4926/32/6/064006

    Abstract PDF Get Citation

    Radiation experiments have been carried out with a SOI NMOSFET. The behavior of double humps was studied under irradiation. The characterization of the hump was demonstrated. The results have shown that the shape of the hump changed along with the total dose and the reason for this was analyzed. In addition, the coupling effect of the back-gate transistor was more important for the main transistor than the parasitic transistor.

  • Optical and electrical characteristics of GaN vertical light emitting diode with current block layer

    Guo Enqing, Liu Zhiqiang, Wang Liancheng, Yi Xiaoyan, Wang Guohong

    J. Semicond.  2011, 32(6): 064007

    doi: 10.1088/1674-4926/32/6/064007

    Abstract PDF Get Citation

    A GaN vertical light emitting diode (LED) with a current block layer (CBL) was investigated. Vertical LEDs without a CBL, with a non-ohmic contact CBL and with a silicon dioxide CBL were fabricated. Optical and electrical tests were carried out. The results show that the light output power of vertical LEDs with a non-ohmic contact CBL and with a silicon dioxide CBL are 40.6% and 60.7% higher than that of vertical LEDs without a CBL at 350 mA, respectively. The efficiencies of vertical LEDs without a CBL, with a non-ohmic contact CBL and with a silicon dioxide CBL drop to 72%, 78% and 85.5% of their maximum efficiency at 350 mA, respectively. Moreover, vertical LEDs with a non-ohmic contact CBL have relatively superior anti-electrostatic ability.

  • Porous waveguide facilitated low divergence quantum cascade laser

    Yin Wen, Lu Quanyong, Liu Wanfeng, Zhang Jinchuan, Wang Lijun, Liu Junqi, Li Lu, Liu Fengqi, Wang Zhanguo

    J. Semicond.  2011, 32(6): 064008

    doi: 10.1088/1674-4926/32/6/064008

    Abstract PDF Get Citation

    A quantum cascade laser with a porous waveguide structure emitting at 4.5 μm is reported. A branch-like porous structure filled with metal material was fabricated on both sides of the laser ridge by an electrochemical etching process. In contrast to the common ridge waveguide laser, devices with a porous structure give rather better beam quality. Utilizing this porous structure as a high-order mode absorber, the device exhibited fundamental transverse mode emission with a nearly diffraction limited far-field beam divergence angle of 4.9o.

  • Modeling and characterization of shielded low loss CPWs on 65 nm node silicon

    Wang Hongrui, Yang Dongxu, Zhang Li, Zhang Lei, Yu Zhiping

    J. Semicond.  2011, 32(6): 064009

    doi: 10.1088/1674-4926/32/6/064009

    Abstract PDF Get Citation

    Coplanar waveguides (CPWs) are promising candidates for high quality passive devices in millimeter-wave frequency bands. In this paper, CPW transmission lines with and without ground shields have been designed and fabricated on 65 nm CMOS technology. A physical-based model is proposed to describe the frequency-dependent per-unit-length L, C, R and G parameters. Starting with a basic CPW structure, the slow-wave effect and ground-shield influence have been analyzed and incorporated into the general model. The accuracy of the model is confirmed by experimental results.

  • Amplified spontaneous emission spectrum and gain characteristic of a two-electrode semiconductor optical amplifier

    Wang Hanchao, Huang Lirong, Shi Zhongwei

    J. Semicond.  2011, 32(6): 064010

    doi: 10.1088/1674-4926/32/6/064010

    Abstract PDF Get Citation

    A two-electrode multi-quantum-well semiconductor optical amplifier is designed and fabricated. The amplified spontaneous emission (ASE) spectrum and gain were measured and analyzed. It is shown that the ASE spectrum and gain characteristic are greatly influenced by the distribution of the injection current density. By changing the injection current density of two electrodes, the full width at half maximum, peak wavelength, peak power of the ASE spectrum and the gain characteristic can be easily controlled.

  • Improving the quality factor of an RF spiral inductor with non-uniform metal width and non-uniform coil spacing

    Shen Pei, Zhang Wanrong, Huang Lu, Jin Dongyue, Xie Hongyun

    J. Semicond.  2011, 32(6): 064011

    doi: 10.1088/1674-4926/32/6/064011

    Abstract PDF Get Citation

    An improved inductor layout with non-uniform metal width and non-uniform spacing is proposed to increase the quality factor (Q factor). For this inductor layout, from outer coil to inner coil, the metal width is reduced by an arithmetic-progression step, while the metal spacing is increased by a geometric-progression step. An improved layout with variable width and changed spacing is of benefit to the Q factor of RF spiral inductor improvement (approximately 42.86%), mainly due to the suppression of eddy-current loss by weakening the current crowding effect in the center of the spiral inductor. In order to increase the Q factor further, for the novel inductor, a patterned ground shield is used with optimized layout together. The results indicate that, in the range of 0.5 to 16 GHz, the Q factor of the novel inductor is at an optimum, which improves by 67% more than conventional inductors with uniform geometry dimensions (equal width and equal spacing), is enhanced by nearly 23% more than a PGS inductor with uniform geometry dimensions, and improves by almost 20% more than an inductor with an improved layout.


  • Monolithically integrated enhancement/depletion-mode AlGaN/GaN HEMT D flip-flop using fluorine plasma treatment

    Xie Yuanbin, Quan Si, Ma Xiaohua, Zhang Jincheng, Li Qingmin, Hao Yue

    J. Semicond.  2011, 32(6): 065001

    doi: 10.1088/1674-4926/32/6/065001

    Abstract PDF Get Citation

    Depletion-mode and enhancement-mode AlGaN/GaN HEMTs using fluorine plasma treatment were integrated on one wafer. Direct-coupled FET logic circuits, such as an E/D HEMT inverter, NAND gate and D flip-flop, were fabricated on an AlGaN/GaN heterostructure. The D flip-flop and NAND gate are demonstrated in a GaN system for the first time. The dual-gate AlGaN/GaN E-HEMT substitutes two single-gate E-HEMTs for simplifying the NAND gate and shrinking the area, integrating with a conventional AlGaN/GaN D-HEMT and demonstrating a NAND gate. E/D-mode D flip-flop was fabricated by integrating the inverters and the NAND gate on the AlGaN/GaN heterostructure. At a supply voltage of 2 V, the E/D inverter shows an output logic swing of 1.7 V, a logic-low noise margin of 0.49 V and a logic-high noise margin of 0.83 V. The NAND gate and D flip-flop showed correct logic function demonstrating promising potential for GaN-based digital ICs.

  • A 3 A sink/source current fast transient response low-dropout Gm driven linear regulator

    Chu Xiuqin, Li Qingwei, Lai Xinquan, Yuan Bing, Li Yanming, Zhao Yongrui

    J. Semicond.  2011, 32(6): 065002

    doi: 10.1088/1674-4926/32/6/065002

    Abstract PDF Get Citation

    A 3 A sink/source Gm-driven CMOS low-dropout regulator (LDO), specially designed for low input voltage and low cost, is presented by utilizing the structure of a current mirror Gm (transconductance) driving technique, which provides high stability as well as a fast load transient response. The proposed LDO was fabricated by a 0.5 μm standard CMOS process, and the die size is as small as 1.0 mm2. The proposed LDO dissipates 220 μA of quiescent current in no-load conditions and is able to deliver up to 3 A of load current. The measured results show that the output voltage can be resumed within 2 μs with a less than 1 mV overshoot and undershoot in the output current step from –1.8 to 1.8 A with a 0.1 μs rising and falling time at three 10 μF ceramic capacitors.

  • A 8.75–11.2-GHz, low phase noise fractional-N synthesizer for 802.11a/b/g zero-IF transceiver

    Mei Niansong, Pan Yaohua, Huang Yumei, Hong Zhiliang

    J. Semicond.  2011, 32(6): 065003

    doi: 10.1088/1674-4926/32/6/065003

    Abstract PDF Get Citation

    An ultra broadband fractional-N frequency synthesizer for 802.11a/b/g zero-IF transceiver application is presented. The mathematical models for the behavior of the synthesizer's spur and phase noise are analyzed, and the optimization methodology is proposed. Measurement results exhibits that the frequency synthesizer's integrated phase noise is less than 1o (1 kHz to 100 MHz) with a 4.375 GHz carrier (after divide-by-2), and the reference frequency spur is below –60 dBc operating with a 33 MHz reference clock. The frequency synthesizer is fabricated on a standard 0.13 μm RF CMOS process and consumes 39.6 mW from a 1.2 V supply voltage.

  • A fractional-N frequency synthesizer-based multi-standard I/Q carrier generation system in 0.13 μm CMOS

    Lou Wenfeng, Geng Zhiqing, Feng Peng, Wu Nanjian

    J. Semicond.  2011, 32(6): 065004

    doi: 10.1088/1674-4926/32/6/065004

    Abstract PDF Get Citation

    This paper proposes a sigma–delta fractional-N frequency synthesizer-based multi-standard I/Q carrier generation system. With reasonable frequency planning, the system can be used in multi-standard wireless communication applications (GSM, WCDMA, GPRS, TD-SCDMA, WLAN (802.11a/b/g)). The implementation is achieved by a 0.13 μm RF CMOS process. The measured results demonstrate that three quadrature VCOs (QVCO) continuously cover the frequency from 3.1 to 6.1 GHz (65.2%), and through the successive divide-by-2 prescalers to achieve the frequency from 0.75 to 6.1 GHz continuously. The chip was fully integrated with the exception of an off-chip filter. The entire chip area is only 3.78 mm2, and the system consumes a 21.7 mA @ 1.2 V supply without output buffers. The lock-in time of the PLL frequency synthesizer is less than 4 μs over the entire frequency range with a direct frequency presetting technique and the auxiliary non-volatile memory (NVM) can store the digital configuration signal of the system, including presetting signals to avoid the calibration process case by case.

  • Ka-band IQ vector modulator employing GaAs HBTs

    Cao Yuxiong, Wu Danyu, Chen Gaopeng, Jin Zhi, Liu Xinyu

    J. Semicond.  2011, 32(6): 065005

    doi: 10.1088/1674-4926/32/6/065005

    Abstract PDF Get Citation

    The importance of high-performance, low-cost and millimeter-wave transmitters for digital communications and radar applications is increasing. The design and performance of a Ka-band balanced in-phase and quadrature-phase (I-Q) type vector modulator, using GaAs heterojunction bipolar transistors (HBTs) as switching elements, are presented. The balanced technique is used to remove the parasitics of the HBTs to result in near perfect constellations. Measurements of the monolithic microwave integrated circuit (MMIC) chip with a size of 1.89 × 2.26 mm2 demonstrate an amplitude error below 1.5 dB and the phase error within 3 between 26 and 40 GHz except for a singular point at 35.6 GHz. The results show that the technique is suitable for millimeter-wave digital communications. μ

  • An energy detection receiver for non-coherent IR-UWB

    Cai Li, Huang Lu, Fu Zhongqian, Yang Jinger, Wang Weidong

    J. Semicond.  2011, 32(6): 065006

    doi: 10.1088/1674-4926/32/6/065006

    Abstract PDF Get Citation

    A non-coherent receiver for impulse radio ultra-wide band (IR-UWB) is presented. The proposed receiver front-end consists of a high gain LNA, a high frequency detector and an intermediate frequency (IF) amplifier to amplify the recovered signal and drive an external test instrument. To meet the requirements of high gain and a low noise figure (NF) under moderate power consumption for the LNA, capacitor cross coupled (CCC) and current reuse techniques were adopted. The detector consists of a squarer and an integrator. The overall circuit consumes 41.2 mA current with a supply voltage of 1.8 V at a 400 MHz pulse rate. The resulting energy efficiency is 0.19 nJ/pulse. A chip prototype is implemented in 0.18-μ m CMOS. The die area is 2.1 × 1.4 mm2 and the active area is 1.7 × 0.98 mm2.

  • A 4 GS/s 4 bit ADC with 3.8 GHz analog bandwidth in GaAs HBT technology

    Wu Danyu, Zhou Lei, Guo Jiannan, Liu Xinyu, Jin Zhi, Chen Jianwu

    J. Semicond.  2011, 32(6): 065007

    doi: 10.1088/1674-4926/32/6/065007

    Abstract PDF Get Citation

    An ultra-wideband 4 GS/s 4 bit analog-to-digital converter (ADC) which is fabricated in 2-level interconnect, 1.4 μm InGaP/GaAs HBT technology is presented. The ADC has a –3 dB analog bandwidth of 3.8 GHz and an effective resolution bandwidth (ERBW) of 2.6 GHz. The ADC adopts folding-interpolating architecture to minimize its size and complexity. A novel bit synchronization circuit is used in the coarse quantizer to eliminate the glitch codes of the ADC. The measurement results show that the chip achieves larger than 3.4 ENOBs with an input frequency band of DC–2.6 GHz and larger than 3.0 ENOBs within DC–4 GHz at 4 GS/s. It has 3.49 ENOBs when increasing input power by 4 dB at 6.001 GHz of input. That indicates that the ADC has the ability of sampling signals from 1st to 3rd Nyquist zones (DC–6 GHz). The measured DNL and INL are both less than ±0.15 LSB. The ADC consumes power of 1.98 W and occupies a total area of 1.45 × 1.45 mm2.

  • An ultra-low-power RF transceiver for WBANs in medical applications

    Zhang Qi, Kuang Xiaofei, Wu Nanjian

    J. Semicond.  2011, 32(6): 065008

    doi: 10.1088/1674-4926/32/6/065008

    Abstract PDF Get Citation

    A 2.4 GHz ultra-low-power RF transceiver with a 900 MHz auxiliary wake-up link for wireless body area networks (WBANs) in medical applications is presented. The RF transceiver with an asymmetric architecture is proposed to achieve high energy efficiency according to the asymmetric communication in WBANs. The transceiver consists of a main receiver (RX) with an ultra-low-power free-running ring oscillator and a high speed main transmitter (TX) with fast lock-in PLL. A passive wake-up receiver (WuRx) for wake-up function with a high power conversion efficiency (PCE) CMOS rectifier is designed to offer the sensor node the capability of work-on-demand with zero standby power. The chip is implemented in a 0.18 μm CMOS process. Its core area is 1.6 mm2. The main RX achieves a sensitivity of –55 dBm at a 100 kbps OOK data rate while consuming just 210 μA current from the 1 V power supply. The main TX achieves +3 dBm output power with a 4 Mbps/500 kbps/200 kbps data rate for OOK/4 FSK/2 FSK modulation and dissipates 3.25 mA/6.5 mA/6.5 mA current from a 1.8 V power supply. The minimum detectable RF input energy for the wake-up RX is –15 dBm and the PCE is more than 25%.

  • A 16.3 pJ/pulse low-complexity and energy-efficient transmitter with adjustable pulse parameters

    Jiang Jun, Zhao Yi, Shao Ke, Chen Hu, Xia Lingli, Hong Zhiliang

    J. Semicond.  2011, 32(6): 065009

    doi: 10.1088/1674-4926/32/6/065009

    Abstract PDF Get Citation

    This paper presents a novel, fully integrated transmitter for 3–5 GHz pulsed UWB. The BPSK modulation transmitter has been implemented in SMIC CMOS 0.13 μ m technology with a 1.2-V supply voltage and a die size of 0.8 × 0.95 mm2. This transmitter is based on the impulse response filter method, which uses a tunable R paralleled with a LC frequency selection network to realize continuously adjustable pulse parameters, including bandwidth, width and amplitude. Due to the extremely low duty of the pulsed UWB, a proposed output buffer is employed to save power consumption significantly. Finally, measurement results show that the transmitter consumes only 16.3 pJ/pulse to achieve a pulse repetition rate of 100 Mb/s. Generated pulses strictly comply with the FCC spectral mask. The continuously variable pulse width is from 900 to 1.5 ns and the amplitude with the minimum 178 mVpp and the maximum 432 mVpp can be achieved.

  • A current mode feed-forward gain control system for a 0.8 V CMOS hearing aid

    Li Fanyang, Yang Haigang, Liu Fei, Yin Tao

    J. Semicond.  2011, 32(6): 065010

    doi: 10.1088/1674-4926/32/6/065010

    Abstract PDF Get Citation

    A current mode feed-forward gain control (CMFGC) technique is presented, which is applied in the front-end system of a hearing aid chip. Compared with conventional automatic gain control (AGC), CMFGC significantly improves the total harmonic distortion (THD) by digital gain control. To attain the digital gain control codes according to the extremely weak output signal from the microphone, a rectifier and a state controller implemented in current mode are proposed. A prototype chip has been designed based on a 0.13 μm standard CMOS process. The measurement results show that the supply voltage can be as low as 0.6 V. And with the 0.8 V supply voltage, the THD is improved and below 0.06% (–64 dB) at the output level of 500 mVp-p, yet the power consumption is limited to 40 μW. In addition, the input referred noise is only 4 μVrms and the maximum gain is maintained at 33 dB.

  • Microelectronic neural bridge for signal regeneration and function rebuilding over two separate nerves

    Shen Xiaoyan, Wang Zhigong, Lü Xiaoying, Xie Shushan, Huang Zonghao

    J. Semicond.  2011, 32(6): 065011

    doi: 10.1088/1674-4926/32/6/065011

    Abstract PDF Get Citation

    According to the feature of neural signals, a micro-electronic neural bridge (MENB) has been designed. It consists of two electrode arrays for neural signal detection and functional electrical stimulation (FES), and a microelectronic circuit for signal amplifying, processing, and FES driving. The core of the system is realized in 0.5-μm CMOS technology and used in animal experiments. A special experimental strategy has been designed to demonstrate the feasibility of the system. With the help of the MENB, the withdrawal reflex function of the left/right leg of one spinal toad has been rebuilt in the corresponding leg of another spinal toad. According to the coherence analysis between the source and regenerated neural signals, the controlled spinal toad's sciatic nerve signal is delayed by 0.72 ms in relation to the sciatic nerve signal of the source spinal toad and the cross-correlation function reaches a value of 0.73. This shows that the regenerated signal is correlated with the source sciatic signal significantly and the neural activities involved in reflex function have been regenerated. The experiment demonstrates that the MENB is useful in rebuilding the neural function between nerves of different bodies.


  • Influence of window layer thickness on double layer antireflection coating for triple junction solar cells

    Wang Lijuan, Zhan Feng, Yu Ying, Zhu Yan, Liu Shaoqing, Huang Shesong, Ni Haiqiao, Niu Zhichuan

    J. Semicond.  2011, 32(6): 066001

    doi: 10.1088/1674-4926/32/6/066001

    Abstract PDF Get Citation

    The optimization of a SiO2/TiO2, SiO2/ZnS double layer antireflection coating (ARC) on Ga0.5In0.5P/In0.02Ga0.98As/Ge solar cells for terrestrial application is discussed. The Al0.5In0.5P window layer thickness is also taken into consideration. It is shown that the optimal parameters of double layer ARC vary with the thickness of the window layer.


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