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Volume 30, Issue 4, Apr 2009

    SEMICONDUCTOR PHYSICS

  • Unipolar resistive switching of Au+-implanted ZrO2 films

    Liu Qi, Long Shibing, Guan Weihua, Zhang Sen, Liu Ming, Chen Junning

    J. Semicond.  2009, 30(4): 042001

    doi: 10.1088/1674-4926/30/4/042001

    Abstract PDF Get Citation

    The resistive switching characteristics of Au+-implanted ZrO2 films are investigated. The Au/Cr/Au+-implanted-ZrO2/n+-Si sandwiched structure exhibits reproducible unipolar resistive switching behavior. After 200 write-read-erase-read cycles, the resistance ratio between the high and low resistance states is more than 180 at a readout bias of 0.7 V. Additionally, the Au/Cr/Au+-implanted-ZrO2/n+-Si structure shows good retention char-acteristics and nearly 100% device yield. The unipolar resistive switching behavior is due to changes in the film conductivity related to the formation and rupture of conducting filamentary paths, which consist of implanted Au ions.

  • SEMICONDUCTOR MATERIALS

  • Optical properties in 1D photonic crystal structure using Si/C60 multilayers

    Chen Jing, Tang Jiyu, Han Peide, Chen Junfang

    J. Semicond.  2009, 30(4): 043001

    doi: 10.1088/1674-4926/30/4/043001

    Abstract PDF Get Citation

    The feasibility of using Si/C60 multilayer films as one-dimensional (1D) photonic band gap crystals was investigated by theoretical calculations using a transfer matrix method (TMM). The response has been studied both within and out of the periodic plane of Si/C60 multilayers. It is found that Si/C60 multilayer films show incomplete photonic band gap (PBG) behavior in the visible frequency range. The fabricated Si/C60 multilayers with two pairs of 70 nm C60 and 30 nm Si layers exhibit a PBG at central wavelength of about 600 nm, and the highest reflectivity can reach 99%. As a consequence, this photonic crystal may be important for fabricating a photonic crystal with an incomplete band gap in the visible frequency range.

  • Growth and electrical properties of high-quality Mg-doped p-type Al0.2Ga0.8N films

    Zhou Xiaowei, Li Peixian, Xu Shengrui, Hao Yue

    J. Semicond.  2009, 30(4): 043002

    doi: 10.1088/1674-4926/30/4/043002

    Abstract PDF Get Citation

    The growth of high-performance Mg-doped p-type AlxGa1-xN (x = 0.2) using metal-organic chemical vapor deposition is reported. The influence of growth conditions (growth temperature, magnesium flow, and thermal annealing temperature) on the electrical properties of Mg-doped p-type AlxGa1-xN (x = 0.2) has been investigated. Using the optimized conditions, we obtained a minimum p-type resistivity of 0.71 ?·cm for p-type AlGaN with 20% Al fraction.

  • Surface morphology of [11-20] a-plane GaN growth by MOCVD on [1-102] r-plane sapphire

    Xu Shengrui, Hao Yue, Duan Huantao, Zhang Jincheng, Zhang Jinfeng, Zhou Xiaowei, Li Zhiming, Ni Jinyu

    J. Semicond.  2009, 30(4): 043003

    doi: 10.1088/1674-4926/30/4/043003

    Abstract PDF Get Citation

    Nonpolara-plane [11-20] GaN has been grown onr-plane [1-102] sapphire by MOCVD, and investigated by high resolution X-ray diffraction and atomic force microscopy. As opposed to thec-direction, this particular orientation is non-polar, and it avoids polarization charge, the associated screening charge and the consequent band bending. Both low-temperature GaN buffer and high-temperature AlN buffer are used fora-plane GaN growth on r-plane sapphire, and the triangular pits and pleat morphology come forth with different buffers, the possible reasons for which are discussed. The triangular and pleat direction are also investigated. A novel modulate buffer is used for a-plane GaN growth on r-plane sapphire, and with this technique, the crystal quality has been greatly improved.

  • Thickness dependence of the properties of transparent conducting ZnO:Zr films deposited on flexible substrates by RF magnetron sputtering

    Zhang Huafu, Lei Chengxin, Liu Hanfa, Yuan Changkun

    J. Semicond.  2009, 30(4): 043004

    doi: 10.1088/1674-4926/30/4/043004

    Abstract PDF Get Citation

    Transparent conducting zirconium-doped zinc oxide (ZnO:Zr) thin films with high transparency, low resistivity and good adhesion were successfully prepared on water-cooled flexible substrates (polyethylene glycol terephthalate, PET) by RF magnetron sputtering. The structural, electrical and optical properties of the films were studied for different thicknesses in detail. X-ray diffraction (XRD) and scanning electron microscopy (SEM) revealed that all the deposited films are polycrystalline with a hexagonal structure and a preferred orientation perpendicular to the substrate. The lowest resistivity achieved is 1.55E-3 Ω·cm for a thickness of 189 nm with a Hall mobility of 17.6 cm2/(V·s) and a carrier concentration of 2.15E20 cm-3. All the films present a high transmittance of above 90% in the wavelength range of the visible spectrum.

  • SEMICONDUCTOR DEVICES

  • Optimized design of 4H-SiC floating junction power Schottky barrier diodes

    Pu Hongbin, Cao Lin, Chen Zhiming, Ren Jie

    J. Semicond.  2009, 30(4): 044001

    doi: 10.1088/1674-4926/30/4/044001

    Abstract PDF Get Citation

    SiC floating junction Schottky barrier diodes were simulated with software MEDICI 4.0 and their device structures were optimized based on forward and reverse electrical characteristics. Compared with the conventional power Schottky barrier diode, the device structure is featured by a highly doped drift region and embedded floating junction region, which can ensure high breakdown voltage while keeping lower specific on-state resistance, solved the contradiction between forward voltage drop and breakdown voltage. The simulation results show that with opti-mized structure parameter, the breakdown voltage can reach 4 kV and the specific on-resistance is 8.3 m?·cm2.

  • 60Co γ-rays irradiation effect in DC performance of AlGaN/GaN high electron mobility transistors

    Gu Wenping, Chen Chi, Duan Huantao, Hao Yue, Zhang Jincheng, Wang Chong, Feng Qian, Ma Xiaohua

    J. Semicond.  2009, 30(4): 044002

    doi: 10.1088/1674-4926/30/4/044002

    Abstract PDF Get Citation

    Unpassivated/passivated AlGaN/GaN high electron mobility transistors (HEMTs) were exposed to 1.25 MeV 60Co γ-rays at a dose of 1 Mrad(Si). The saturation drain current of the unpassivated devices decreased by 15% at 1 Mrad-dose, and the maximal transconductance decreased by 9.1% under the same condition; moreover, either forward or reverse gate bias current was significantly increased, while the threshold voltage is relatively unaffected. By sharp contrast, the passivated devices showed scarcely any change in saturation drain current and maximal transconductance at the same dose. Based on the differences between the passivated HEMTs and un-passivated HEMTs, adding the C–V measurement results, the obviously parameter degradation of the unpassivated AlGaN/GaN HEMTs is believed to be caused by the creation of electronegative surface state charges in source–gate spacer and gate–drain spacer at the low dose (1 Mrad). These results reveal that the passivation is effective in reducing the effects of surface state charges induced by the 60Co γ-rays irradiation, so the passivation is an effective reinforced approach.

  • Considerations of dopant-dependent bandgap narrowing for accurate device simulation in abrupt HBTs

    Zhou Shouli, Xiong Deping, Qin Yali

    J. Semicond.  2009, 30(4): 044003

    doi: 10.1088/1674-4926/30/4/044003

    Abstract PDF Get Citation

    Heavy doping of the base in HBTs brings about a bandgap narrowing (BGN) effect, which modifies the intrinsic carrier density and disturbs the band offset, and thus leads to the change of the currents. Based on a thermionic-field-diffusion model that is used to the analyze the performance of an abrupt HBT with a heavy-doped base, the conclusion is made that, although the BGN effect makes the currents obviously change due to the modification of the intrinsic carrier density, the band offsets disturbed by the BGN effect should also be taken into account in the analysis of the electrical characteristics of abrupt HBTs. In addition, the BGN effect changes the bias voltage for the onset of Kirk effects.

  • Degradation of ultra-thin gate oxide LDD NMOSFET under GIDL stress

    Hu Shigang, Hao Yue, Cao Yanrong, Ma Xiaohua, Wu Xiaofeng, Chen Chi, Zhou Qingjun

    J. Semicond.  2009, 30(4): 044004

    doi: 10.1088/1674-4926/30/4/044004

    Abstract PDF Get Citation

    The degradation of device under GIDL (gate-induced drain leakage current) stress has been studied using LDD NMOSFETs with 1.4 nm gate oxides. Experimental result shows that the degradation of device parameters depends more strongly on Vd than on Vg. The characteristics of the GIDL current are used to analyze the damage generated during the stress. It is clearly found that the change of GIDL current before and after stress can be divided into two stages. The trapping of holes in the oxide is dominant in the first stage, but that of electrons in the oxide is dominant in the second stage. It is due to the common effects of edge direct tunneling and band-to-band tunneling. SILC (stress induced leakage current) in the NMOSFET decreases with increasing stress time under GIDL stress. The degradation characteristic of SILC also shows saturating time dependence. SILC is strongly dependent on the measured gate voltage. The higher the measured gate voltage, the less serious the degradation of the gate current. A likely mechanism is presented to explain the origin of SILC during GIDL stress.

  • A new level-shifting structure with multiply metal rings by divided RESURF technique

    Liu Jizhi, Chen Xingbi

    J. Semicond.  2009, 30(4): 044005

    doi: 10.1088/1674-4926/30/4/044005

    Abstract PDF Get Citation

    A new structure of a lateral n-MOST and a new level-shifting structure with multiply metal rings (MMRs) by divided RESURF technique have been proposed. The device and electrical performances of the structure are analyzed and simulated by MEDICI. In comparison to the level-shifting structure with multiply floating field plates (MFFPs) used before, the structure stated here improves the reliability and diminishes the voltage difference between the voltage of the power supply of the high-side gate driver and the voltage of the output terminal of the level-shifting structure, which is also that of the input terminal of the high-side gate driver. The maximal voltage difference of the level-shifting structure in this paper is 30% lower than that used before. Therefore, good voltage isolation and current isolation are obtained. The structure can be used in the level-shifting circuit of various applications.

  • Photo-sensitive characteristics of negative resistance turn-around occurring in SIPTH

    Ji Tao, Yang Licheng, Li Hairong, He Shanhu, Li Siyuan

    J. Semicond.  2009, 30(4): 044006

    doi: 10.1088/1674-4926/30/4/044006

    Abstract PDF Get Citation

    Influences of light irradiation on the negative resistance turn-around characteristics of static induction photosensitive thyristor (SIPTH) have been experimentally and theoretically studied. As the gate current of SIPTH is increased by the light irradiation, the potential barrier in the channel is reduced due to the increase in voltage drop across the gate series resistance. Therefore, SIPTH can be quickly switched from the blocking state to the conducting state by relatively low anode voltage. The optimal matching relation for controlling anode conducting voltage of SIPTH by light irradiation has also been represented.

  • Spectrum study of top-emitting organic light-emitting devices with micro-cavity structure

    Liu Xiang, Wei Fuxiang, Liu Hui

    J. Semicond.  2009, 30(4): 044007

    doi: 10.1088/1674-4926/30/4/044007

    Abstract PDF Get Citation

    Blue and white top-emitting organic light-emitting devices OLEDs with cavity effect have been fabri-cated. TBADN:3%DSAPh and Alq3:DCJTB/TBADN:TBPe/Alq3:C545 were used as emitting materials of micro-cavity OLEDs. On a patterned glass substrate, silver was deposited as reflective anode, and copper phthalocyanine (CuPc) layer as HIL and 4’-bis[N-(1-Naphthyl)- N-phenyl-amino]biphenyl (NPB) layer as HTL were made. Al/Ag thin films were made as semi-transparent cathode with a transmittance of about 30%. By changing the thickness of indium tin oxide ITO, deep blue with Commission Internationale de L’Eclairage chromaticity coordinates (CIEx,y) of (0.141, 0.049) was obtained on TBADN:3%DSAPh devices, and different color (red, blue and green) was obtained on Alq3:DCJTB/TBADN:TBPe/Alq3:C545 devices, full width at half maxima (FWHM) was only 17 nm. The spectral intensity and FWHM of emission in cavity devices have also been studied.

  • A high-efficiency high-power evanescently coupled UTC-photodiode

    Zhang Yunxiao, Liao Zaiyi, Zhao Lingjuan, Zhu Hongliang, Pan Jiaoqing, Wang Wei

    J. Semicond.  2009, 30(4): 044008

    doi: 10.1088/1674-4926/30/4/044008

    Abstract PDF Get Citation

    The effects of the multimode diluted waveguide on quantum efficiency and saturation behavior of the evanescently coupled uni-traveling carrier (UTC) photodiode structures are reported. Two kinds of evanescently coupled uni-traveling carrier photodiodes (EC-UTC-PD) were designed and characterized: one is a conventional EC-UTC-PD structure with a multimode diluted waveguide integrated with a UTC-PD; and the other is a compact EC-UTC-PD structure which fused the multimode diluted waveguide and the UTC-PD structure together. The effect of the absorption behavior of the photodiodes on the efficiency and saturation characteristics of the EC-UTC-PDs is analyzed using 3-D beam propagation method, and the results indicate that both the responsivity and saturation power of the compact EC-UTC-PD structures can be further improved by incorporating an optimized compact multimode diluted waveguide.

  • Microwave frequency detector at X-band using GaAs MMIC technology

    Zhang Jun, Liao Xiaoping, Jiao Yongchang

    J. Semicond.  2009, 30(4): 044009

    doi: 10.1088/1674-4926/30/4/044009

    Abstract PDF Get Citation

    The design, fabrication, and experimental results of an MEMS microwave frequency detector are pre-sented for the first time. The structure consists of a microwave power divider, two CPW transmission lines, a mi-crowave power combiner, an MEMS capacitive power sensor and a thermopile. The detector has been designed and fabricated on GaAs substrate using the MMIC process at the X-band successfully. The MEMS capacitive power sensor is used for detecting the high power signal, while the thermopile is used for detecting the low power signal. Signals of 17 and 10 dBm are measured over the X-band. The sensitivity is 0.56 MHz/fF under 17 dBm by the capac-itive power sensor, and 6.67 MHz/V under 10 dBm by the thermopile, respectively. The validity of the presented design has been confirmed by the experiment.

  • Design and fabrication of a terminating type MEMS microwave power sensor

    Xu Yinglin, Liao Xiaoping

    J. Semicond.  2009, 30(4): 044010

    doi: 10.1088/1674-4926/30/4/044010

    Abstract PDF Get Citation

    A terminating type MEMS microwave power sensor based on the Seebeck effect and compatible with the GaAs MMIC process is presented. An electrothermal model is introduced to simulate the heat transfer behavior and temperature distribution. The sensor measured the microwave power from –20 to 20 dBm up to 20 GHz. The sensitivity of the sensor is 0.27 mV/mW at 20 GHz, and the input return loss is less than –26 dB over the entire experiment frequency range. In order to improve the sensitivity, four different types of coplanar waveguide (CPW) were designed and the sensitivity was significantly increased by about a factor of 2.

  • Thermal analysis and test for single concentrator solar cells

    Cui Min, Chen Nuofu, Yang Xiaoli, Wang Yu, Bai Yiming, Zhang Xingwang

    J. Semicond.  2009, 30(4): 044011

    doi: 10.1088/1674-4926/30/4/044011

    Abstract PDF Get Citation

    A thermal model for concentrator solar cells based on energy conservation principles was designed. Under 400X concentration with no cooling aid, the cell temperature would get up to about 1200 . Metal plates were used as heat sinks for cooling the system, which remarkably reduce the cell temperature. For a fixed concentration ratio, the cell temperature reduced as the heat sink area increased. In order to keep the cell at a constant temperature, the heat sink area needs to increase linearly as a function of the concentration ratio. GaInP/GaAs/Ge triple-junction solar cells were fabricated to verify the model. A cell temperature of 37  was measured when using a heat sink at 400X concentration.

  • High-performance micromachined gyroscope with a slanted suspension cantilever

    Xiao Dingbang, Wu Xuezhong, Hou Zhanqiang, Chen Zhihua, Dong Peitao, Li Shengyi

    J. Semicond.  2009, 30(4): 044012

    doi: 10.1088/1674-4926/30/4/044012

    Abstract PDF Get Citation

    This paper presents a novel structure for improving the stability and the mechanical noise of micromachined gyroscopes. Only one slanted cantilever is used for suspension in this gyroscope, so the asymmetry spring and the thermal stress, which most micromachined gyroscopes suffer from, are reduced. In order to reduce the mechani-cal noise, the proof masses are designed to be much larger than in most micromachined gyroscopes. The gyroscope chip is sealed at 0.001 Pa vacuum. A gyroscope sample and its read-out circuit are fabricated. The scale factor of this gyroscope is measured as 57.6 mV/(deg/sec) with a nonlinearity better than 0.12% in a measurement range of ±100 deg/sec. The short-term bias stability in 20 min is 60 deg/h.

  • SEMICONDUCTOR INTEGRATED CIRCUITS

  • Design of a 24–40 GHz balanced low noise amplifier using Lange couplers

    Zhang Zongnan, Huang Qinghua, Hao Mingli, Yang Hao, Zhang Haiying

    J. Semicond.  2009, 30(4): 045001

    doi: 10.1088/1674-4926/30/4/045001

    Abstract PDF Get Citation

    A wide band (24–40 GHz) fully integrated balanced low noise amplifier (LNA) using Lange couplers was designed and fabricated with a 0.15 μm pseudomorphic HEMT (pHEMT) technology. A new method to design a low-loss and high-coupling Lange coupler for wide band application in microwave frequency was also presented. This Lange coupler has a minimum loss of 0.09 dB and a maximum loss of 0.2 dB over the bandwidth from 20 to 45 GHz. The measured results show that the realized four-stage balanced LNA using this Lange coupler exhibites a noise figure (NF) of less than 2.7 dB and the maximum gain of 30 dB; moreover, a noticeably improved reflection performance is achieved. The input VSWR and the output VSWR are respectively less than 1.45 and 1.35 dB across the 24–40 GHz frequency range.

  • A cross-coupled-structure-based temperature sensor with reduced process variation sensitivity

    Tie Meng, Cheng Xu

    J. Semicond.  2009, 30(4): 045002

    doi: 10.1088/1674-4926/30/4/045002

    Abstract PDF Get Citation

    An innovative, thermally-insensitive phenomenon of cascaded cross-coupled structures is found. And a novel CMOS temperature sensor based on a cross-coupled structure is proposed. This sensor consists of two different ring oscillators. The first ring oscillator generates pulses that have a period, changing linearly with temperature. Instead of using the system clock like in traditional sensors, the second oscillator utilizes a cascaded cross-coupled structure to generate temperature independent pulses to capture the result from the first oscillator. Due to the compen-sation between the two ring oscillators, errors caused by supply voltage variations and systematic process variations are reduced. The layout design of the sensor is based on the TSMC13G process standard cell library. Only three inverters are modified for proper channel width tuning without any other custom design. This allows for an easy integration of the sensor into cell-based chips. Post-layout simulations results show that an error lower than ±1.1 ℃ can be achieved in the full temperature range from -40 to 120 ℃. As shown by SPICE simulations, the thermal insensitivity of the cross-coupled inverters can be realized for various TSMC technologies: 0.25 μm, 0.18 μm, 0.13 μm, and 65 nm.

  • An ultra-low-power CMOS temperature sensor for RFID applications

    Xu Conghui, Gao Peijun, Che Wenyi, Tan Xi, Yan Na , Min Hao

    J. Semicond.  2009, 30(4): 045003

    doi: 10.1088/1674-4926/30/4/045003

    Abstract PDF Get Citation

    An ultra-low-power CMOS temperature sensor with analog-to-digital readout circuitry for RFID appli-cations was implemented in a 0.18-μm CMOS process. To achieve ultra-low power consumption, an error model is proposed and the corresponding novel temperature sensor front-end with a new double-measure method is presented. Analog-to-digital conversion is accomplished by a sigma-delta converter. The complete system consumes only 26 A @ 1.8 V for continuous operation and achieves an accuracy of ±0.65 ℃ from –20 to 120 ℃ after calibration at one temperature.

  • Design of an ultra-low-power digital processor for passive UHF RFID tags

    Shi Wanggen, Zhuang Yiqi, Li Xiaoming, Wang Xianghua, Jin Zhao, Wang Dan

    J. Semicond.  2009, 30(4): 045004

    doi: 10.1088/1674-4926/30/4/045004

    Abstract PDF Get Citation

    A new architecture of digital processors for passive UHF radio-frequency identification tags is proposed. This architecture is based on ISO/IEC 18000-6C and targeted at ultra-low power consumption. By applying methods like system-level power management, global clock gating and low voltage implementation, the total power of the design is reduced to a few microwatts. In addition, an innovative way for the design of a true RNG is presented, which contributes to both low power and secure data transaction. The digital processor is verified by an integrated FPGA platform and implemented by the Synopsys design kit for ASIC flows. The design fits different CMOS technologies and has been taped out using the 2P4M 0.35 μm process of Chartered Semiconductor.

  • Design procedure for optimizing CMOS low noise operational amplifiers

    Li Zhiyuan, Ye Yizheng, Ma Jianguo

    J. Semicond.  2009, 30(4): 045005

    doi: 10.1088/1674-4926/30/4/045005

    Abstract PDF Get Citation

    This paper presents and experimentally verifies an optimized design procedure for a CMOS low noise operational amplifier. The design procedure focuses on the noise performance, which is the key requirement for low noise operational amplifiers. Based on the noise level and other specifications such as bandwidth, signal swing, slew rate, and power consumption, the device sizes and the biasing conditions are derived. In order to verify the proposed design procedure, a three-stage operational amplifier has been designed. The device parameters obtained from the proposed design procedure closely agree with the simulated results obtained by using HSPICE.

  • A capacitor-free CMOS LDO regulator with AC-boosting and active-feedback frequency compensation

    Zhou Qianneng, Wang Yongsheng, Lai Fengchang

    J. Semicond.  2009, 30(4): 045006

    doi: 10.1088/1674-4926/30/4/045006

    Abstract PDF Get Citation

    A capacitor-free CMOS low-dropout (LDO) regulator for system-on-chip (SoC) applications is pre-sented. By adopting AC-boosting and active-feedback frequency compensation (ACB-AFFC), the proposed LDO regulator, which is independent of an off-chip capacitor, provides high closed-loop stability. Moreover, a slew rate enhancement circuit is adopted to increase the slew rate and decrease the output voltage dips when the load current is suddenly switched from low to high. The LDO regulator is designed and fabricated in a 0.6 μm CMOS process. The active silicon area is only 770 × 472 μm2. Experimental results show that the total error of the output voltage due to line variation is less than ±0.197%. The load regulation is only 0.35 mV/mA when the load current changes from 0 to 100 mA.

  • A fast-settling frequency-presetting PLL frequency synthesizer with process variation compensation and spur reduction

    Yan Xiaozhou, Kuang Xiaofei, Wu Nanjian

    J. Semicond.  2009, 30(4): 045007

    doi: 10.1088/1674-4926/30/4/045007

    Abstract PDF Get Citation

    This paper proposes a fast-settling frequency-presetting PLL frequency synthesizer. A mixed-signal VCO and a digital processor are developed to accurately preset the frequency of VCO and greatly reduce the settling time. An auxiliary tuning loop is introduced in order to reduce reference spur caused by leakage current. The digital pro-cessor can automatically compensate presetting frequency variation with process and temperature, and control the operation of the auxiliary tuning loop. A 1.2 GHz integer-Nsynthesizer with 1 MHz reference input was imple-mented in a 0.18μm process. The measured results demonstrate that the typical settling time of the synthesizer is less than 3 s, and the phase noise is –108 dBc/Hz @ 1 MHz. The reference spur is –52 dBc.

  • A 10 Gb/s receiver with half rate period calibration CDR and CTLE/DFE combiner

    Gao Zhuo, Yang Zongren, Zhao Ying, Yang Yi, Zhang Lu, Huang Lingyi, Hu Weiwu

    J. Semicond.  2009, 30(4): 045008

    doi: 10.1088/1674-4926/30/4/045008

    Abstract PDF Get Citation

    This paper presents the design of a 10 Gb/s low power wire-line receiver in the 65 nm CMOS process with 1 V supply voltage. The receiver occupies 300×500 μm2. With the novel half rate period calibration clock data recovery (CDR) circuit, the receiver consumes 52 mW power. The receiver can compensate a wide range of channel loss by combining the low power wideband programmable continuous time linear equalizer (CTLE) and decision feedback equalizer (DFE).

  • Design of anti-jamming current-sensing circuit for current-mode buck regulator

    Yuan Bing, Lai Xinquan, Li Yanming, Ye Qiang, Jia Xinzhang

    J. Semicond.  2009, 30(4): 045009

    doi: 10.1088/1674-4926/30/4/045009

    Abstract PDF Get Citation

    A novel anti-jamming integrated CMOS current-sensing circuit for current-mode buck regulators is pre-sented. Based on the widely-used traditional current-sensing structure, anti-jamming performance is improved sig-nificantly by adding on-chip capacitors and one-shot circuit. Also the transient response is faster through the in-troduction of current offset. The circuit is concise, simple to implement and suits for SoC applications with single power supply. A dual-output current-mode DC-DC buck converter with proposed structure has been fabricated with a 0.5μm CMOS process for validation. In the 2.5–5.5 V input range, the two channels work steadily in the load current range of 0–600 mA. And the measured maximum efficiency is up to 96%.

  • SEMICONDUCTOR TECHNOLOGY

  • Effects of pattern characteristics on copper CMP

    Ruan Wenbiao, Chen Lan, Li Zhigang, Ye Tianchun

    J. Semicond.  2009, 30(4): 046001

    doi: 10.1088/1674-4926/30/4/046001

    Abstract PDF Get Citation

    Copper chemical mechanical polishing (CMP) is influenced by geometric characteristics such as line width and pattern density, as well as by the more obvious parameters such as slurry chemistry, pad type, polishing pressure and rotational speed. Variations in the copper thickness across each die and across the wafer can impact the circuit performance and reduce the yield. In this paper, we propose a modeling method to simulate the polishing behavior as a function of layout pattern factors. Under the same process conditions, the pattern density, the line width and the line spacing have a strong influence on copper dishing, dielectric erosion and topography. The test results showed: the wider the copper line or the spacing, the higher the copper dishing; the higher the density, the higher the dielectric erosion; the dishing and erosion increase slowly as a function of increasing density and go into saturation when the density is more than 0.7.

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