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Volume 29, Issue 11, Nov 2008


  • The Bipolar Field-Effect Transistor:VI.The CMOS Voltage Inverter Circuit(Two-MOS-Gates on Pure-Base)

    Jie Binbin, Sah Chih-Tang

    J. Semicond.  2008, 29(11): 2079

    Abstract PDF

    This paper reports the DC steady-state voltage and current transfer characteristics and power dissipation of the Complimentary Metal-Oxide-Silicon (CMOS) voltage-inverter circuit using one physical Bipolar Field-Effect Transistor (BiFET) of nanometer dimensions. The electrical characteristics are numerically obtained by solving the five partial differential equations for the transistor structure of two MOS-gates on the two surfaces of a thin pure silicon base layer with electron and hole contacts on both ends of the thin base. Internal and CMOS boundary conditions are used on the three potentials (electrostatic and electron and hole electrochemical potentials). Families of curves are rapidly computed using a dual-processor personal computer running the 64-bit FORTRAN on the Windows XP operating system.

  • External Quantum Efficiency of Quantum Well Solar Cells

    Lou Chaogang, Yan Ting, Sun Qiang, Xu Jun, Zhang Xiaobing, Lei Wei

    J. Semicond.  2008, 29(11): 2088

    Abstract PDF

    The external quantum efficiency of quantum well solar cells (QWSCs) is compared with the control cells without multi-quantum wells.The QWSCs extend the absorption spectrum from 870 to 1000nm.When the wavelength is below 680nm,the external quantum efficiency of the QWSCs is lower than that of the control cells,but when the wavelength is above 680nm,the external quantum efficiency of the QWSCs is higher than that of the control cells.The possible reasons for this phenomenon are discussed.Basing on the experimental data,the possibility of substituting the middle cells of conventional triple-junction solar cells with the QWSCs to improve their performance is also discussed.

  • A Complete Surface Potential-Based Core Model for Undoped Symmetric Double-Gate MOSFETs

    He Jin, Zhang Lining, Zhang Jian, Fu Yue, Zheng Rui, Zhang Xing

    J. Semicond.  2008, 29(11): 2092

    Abstract PDF

    A surface potential-based model for undoped symmetric double-gate MOSFETs is derived by solving Poisson’s equation to obtain the relationship between the surface potential and voltage in the channel region in a self-consistent way.The drain current expression is then obtained from Pao-Sah’s double integral.The model consists of one set of surface potential equations,and the analytic drain current can be evaluated from the surface potential at the source and drain ends. It is demonstrated that the model is valid for all operation regions of the double-gate MOSFETs and without any need for simplification (e.g.,by using the charge sheet assumption) or auxiliary fitting functions.The model has been verified by extensive comparisons with 2D numerical simulation under different operation conditions with different geometries.The consistency between the model calculation and numerical simulation demonstrates the accuracy of the model.

  • An InGaP/GaAs HBT MIC Power Amplifier with Power Combining at the X-Band

    Chen Yanhu, Shen Huajun, Wang Xiantai, Chen Gaopeng, Liu Xinyu, Yuan Dongfeng, Wang Zuqiang

    J. Semicond.  2008, 29(11): 2098

    Abstract PDF

    A MIC power amplifier with power combining based on InGaP/GaAs HBT is developed and measured for the application of the latest high power amplifier stage of the X-band.A novel InGaP/GaAs HBT power transistor with an on-chip RC stabilization network is used as the power combing cell to improve the stability of the circuit.A compact microstripe line parallel matching network is used to divide and combine the power.By biasing the amplifier at class AB:Vcc=7V,Ic=230mA,a maximum CW stabile output power of 28.9dBm and a power combine efficiency of 80% are achieved at 8.1GHz.

  • A 2GHz Power Amplifier Realized in IBM SiGe BiCMOS Technology 5PAe

    Song Jiayou, Wang Zhigong, Peng Yanjun

    J. Semicond.  2008, 29(11): 2101

    Abstract PDF

    A 2GHz power amplifier realized in IBM 5PAe 0.35μm SiGe BiCMOS technology is reported.This amplifier was implemented in a two-stage single-ended structure.All components except choking inductors were integrated on-chip.Full-frequency stability was achieved using serial resistors between the bases of the transistors and matching inductors.The off-chip test proved the stability under all the supplied voltages.At VC=3.5V,VB=6V,the small signal gain was 20.8dB,the input and output reflectance was less than -17 and -16dB,respectively,and the Pout-2dB was about 24dBm.At the output power of 25.1dBm,the PAE was about 21.5%,and the second and third harmonics were less than -45 and -52dBc,respectively.This insures the linearity of the circuits.

  • A 3GHz Low-Power and Low-Phase-Noise LC VCO with a Self-Biasing Current Source

    Chen Pufeng, Li Zhiqiang, Huang Shuilong, Zhang Haiying, Ye Tianchun

    J. Semicond.  2008, 29(11): 2106

    Abstract PDF

    A fully integrated 3GHz low-power and low-phase-noise voltage-controlled oscillator (VCO) with a self-biasing current source was implemented in a standard 0.18μm CMOS process.A trade-off between noise and power was realized through the optimization of the improved current source.The VCO can be tuned from 2.83 to 3.25GHz with a 13.8% tuning range.The measured phase noise at 1MHz offset is -111dBc/Hz at a frequency of 3.22GHz while the core circuit draws less than 2mA from a 1.8V supply voltage.These results make the circuit suitable for a 5GHz wireless local area network (WLAN) receiver and 3.4 to 3.6GHz world interoperability for microwave access (WiMAX) application.

  • Modeling of High-Voltage LDMOS for PDP Driver ICs

    Li Haisong, Sun Weifeng, Yi Yangbo, Shi Longxing

    J. Semicond.  2008, 29(11): 2110

    Abstract PDF

    A SPICE sub-circuit model is developed for high-voltage LDMOS transistors integrated in PDP driver ICs.The model accounts for intrinsic LDMOS phenomena such as the quasi-saturation effects,voltage-dependent drift resistance,self-heating effects,and Miller capacitance.In contrast to most physical or sub-circuit models,the proposed model not only provides precise simulated results,but also brings a very fast modeling procedure.Furthermore,the model also can be embedded in a commercial SPICE simulator easily.The simulation results using the presented models agree well with the measured ones and the error is less than 5%.


  • Photoluminescence of the Beryllium Acceptor at the Centre of Quantum Wells

    Zheng Weimin, Li Sumei, Lü Yingbo, Wang Aifang, Wu Ailing

    J. Semicond.  2008, 29(11): 2115

    Abstract PDF

    We report photoluminescence studies of internal transitions of shallow Be acceptors in bulk GaAs and a series of δ-doped GaAs/AlAs multiple quantum well samples with well width ranging from 3 to 20nm.A series of Be δ-doped GaAs/AlAs multiple-quantum wells with the doping at the well center and a single epilayer of GaAs uniformly Be doped were grown by molecular beam epitaxy.The photoluminescence spectra were measured at 4,20,40,80,and 120K,respectively.A two-hole transition of the acceptor-bound exciton from the ground state,1S3/2(Γ6),to the first-excited state,2S3/2(Γ6) ,has been clearly observed.A variational principle is presented to obtain the 2s-1s transition energies of quantum confined Be acceptors as a function of the well width under the single-band effective mass and envelop function approximations.It is found that the acceptor transition energy increases with decreasing quantum-well width,and the experimental results agree well with the theoretical calculation.

  • The Origin of Multi-Peak Structures Observed in Photoluminescence Spectra of InAs/GaAs Quantum Dots

    Liang Zhimei, Wu Ju, Jin Peng, Lü Xueqin, Wang Zhanguo

    J. Semicond.  2008, 29(11): 2121

    Abstract PDF

    Multi-peak structures in photoluminescence spectra of InAs/GaAs quantum dots are investigated.Excitation power-dependent photoluminescence spectra are used to identify the nature of different peaks.By combining experimental results and an energy-level structure analysis,origins of the multi-peaks are identified.Furthermore,inter-subband spacing of electrons and holes are deduced.

  • The Microstructure Evolution of Intrinsic Microcrystalline Silicon Films and Its Influence on the Photovoltaic Performance of Thin-Film Silicon Solar Cells

    Yuan Yujie, Hou Guofu, Zhang Jianjun, Xue Junming, Zhao Ying, Geng Xinhua

    J. Semicond.  2008, 29(11): 2125

    Abstract PDF

    Hydrogenated microcrystalline silicon (μc-Si:H) intrinsic films and solar cells are prepared by plasma enhanced chemical vapor deposition (PECVD) with various hydrogen dilution ratios.The influence of hydrogen dilution ratios on electrical characteristics is investigated to study the phase transition from amorphous to microcrystalline silicon.During the deposition process,the optical emission spectroscopy (OES) from plasma is recorded and compared with the Raman spectra of the films,by which the microstructure evolution of different H2 dilution ratios and its influence on the performance of μc-Si:H n-i-p solar cells is investigated.

  • Deposition of p-Type Microcrystalline Silicon Film and Its Application in Microcrystalline Silicon Solar Cells

    Chen Yongsheng, Yang Shi'e, Wang Jianhua, Lu Jingxiao, Gao Xiaoyong, Gu Jinhua, Zheng Wen, Zhao Shangli

    J. Semicond.  2008, 29(11): 2130

    Abstract PDF

    Highly conductive boron-doped hydrogenated microcrystalline silicon (μc-Si:H) films and solar cells are prepared by plasma enhanced chemical vapour deposition (PECVD).The effects of diborane concentration,thickness and substrate temperature on the growth and properties of B-doped layers and the performance of solar cells with high deposited rate i-layers are investigated.With the optimum p-layer deposition parameters,a higher efficiency of 5.5% is obtained with 0.78nm/s deposited i-layers.In addition,the carriers transport mechanism of p-type μc-Si:H films is discussed.

  • Degradation of nMOS and pMOSFETs with Ultrathin Gate Oxide Under DT Stress

    Hu Shigang, Hao Yue, Ma Xiaohua, Cao Yanrong, Chen Chi, Wu Xiaofeng

    J. Semicond.  2008, 29(11): 2136

    Abstract PDF

    The degradation of device parameters and the degradation of the stress induced leakage current (SILC) of thin tunnel gate oxide under constant direct-tunneling voltage stress are studied using nMOS and pMOSFETs with 1.4nm gate oxides.Experimental results show that there is a linear correlation between the degradation of the SILC and the degradation of Vth in MOSFETs during different direct-tunneling (DT) stresses.A model of tunneling assisted by interface traps and oxide trapped positive charges is developed to explain the origin of SILC during DT stress.

  • Electrical Characteristics and Reliability of Ultra-Thin Gate Oxides (<2nm) with Plasma Nitridation

    Sun Ling, Liu Wei, Duan Zhenyong, Xu Zhongyi, Yang Huayue

    J. Semicond.  2008, 29(11): 2143

    Abstract PDF

    MMT (modified magnetron typed) plasma nitridation and NO anneal are used to treat ultra-thin gate oxides in MOSFETs (metal-oxide-semiconductor field effect transistors).Dual-peak and single-peak N distributions are formed after nitridation.The dual-peak N distribution shows excellent electrical properties and superior reliability in terms of drain current,channel carrier mobility,and TDDB characteristics.The results indicate a means to extend silicon oxynitride as a promising gate dielectric for developing ultralarge scale integrated (ULSI) technology.

  • Back-Gate Effect of SOI LDMOSFETs

    Bi Jinshun, Song Limei, Hai Chaohe, Han Zhengsheng

    J. Semicond.  2008, 29(11): 2148

    Abstract PDF

    0.5μm-gate-length lateral double-diffused metal-oxide-semiconductor field-effect transistors (LDMOSFETs) with low barrier body contact (LBBC) and body tied to the source (BTS) were fabricated on silicon-on-insulator (SOI) substrates.The back-gate effects on front-channel subthreshold characteristics,on-resistance,and off-state breakdown characteristics of these devices are studied in detail.The LDMOSFETs with the LBBC structure show less back-gate effect than those with the BTS structure due to better control of the floating body effect and suppression of the parasitic back-channel leakage current.A model for the SOI LDMOSFETs has been given,including the front- and back-channel conductions as well as the bias-dependent series resistance.

  • Output Characteristics of n-Buried-pSOI Sandwiched RF Power LDMOS

    Li Zehong, Wu Lijuan, Zhang Bo, Li Zhaoji

    J. Semicond.  2008, 29(11): 2153

    Abstract PDF

    A novel n-buried-pSOI sandwiched structure for an RF power LDMOS is proposed.The output characteristics of the RF power LDMOS are greatly affected by the drain-substrate parasitic capacitance.The output characteristics become better as the drain-substrate parasitic capacitance decreases.Results show that the drain-substrate capacitance of the n-buried-pSOI sandwiched LDMOS is 46.6% less than that of the normal LDMOS,and 11.5% less than that of the n-buried-pSOI LDMOS,respectively.At 1dB compression point,its output power is 188% higher than that of the normal LDMOS,and 10.6% higher than that of the n-buried-pSOI LDMOS,respectively. The power-added efficiency of the proposed structure is 38.3%.The breakdown voltage of the proposed structure is 11% more than that of the normal LDMOS.

  • Total Ionizing Dose Radiation Effects of RF PDSOI LDMOS Transistors

    Liu Mengxin, Han Zhengsheng, Bi Jinshun, Fan Xuemei, Liu Gang, Du Huan, Song Limei

    J. Semicond.  2008, 29(11): 2158

    Abstract PDF

    The effects of total ionizing dose radiation on direct current (DC) and small-signal radio frequency (RF) performance of multi-finger RF partial deplete silicon-on-insulator lateral double diffused MOS (PDSOI LDMOS) transistors are investigated.The radiation response of the LDMOS transistors with different device structures is characterized for an equivalent gamma dose up to 1Mrad(Si) at room temperature.The front and back gate threshold voltages,off-state leakage,transconductance,and output characteristics are measured before and after radiation,and the results show a significant degradation of DC performance.Moreover,high frequency measurements for the irradiated transistors indicate remarkable declines of S-parameters,cutoff frequency,and maximum oscillation frequency to 1Mrad(Si) exposure levels.Compared to the transistors with the BTS contact structure,the transistors with the LBBC contact do not show its excellent DC radiation hardness when the transistors operate at alternating current (AC) mode.

  • Design Analysis of a Novel Low Triggering Voltage Dual Direction SCR ESD Device in 0.18μm Mixed Mode RFCMOS Technology

    Zhu Kehan, Yu Zongguang, Dong Shurong, Han Yan

    J. Semicond.  2008, 29(11): 2164

    Abstract PDF

    A novel SCR on-chip ESD device is proposed to protect IC chips against ESD stressing in two opposite directions.The triggering voltages of four types of dual direction SCRs (DDSCR) are compared and analyzed.pMOS or nMOS are embedded into the structures to adjust their triggering voltages.Both MOSFETs embedded DDSCRs have tunable triggering voltage,low DC leakage (~pA),and fast turn on speed snapback I-V characteristics without latch-up problem.It achieves high ESD performance of ~94V/μm.The new ESD protection devices are area efficient and can reduce the parasitic effects significantly.

  • Microfabrication and Evaluation of a Silicon MicroelectrodeBased on SOI Wafer

    Sui Xiaohong, Chen Hongda

    J. Semicond.  2008, 29(11): 2169

    Abstract PDF

    An implantable seven-channel silicon microelectrode was fabricated by MEMS (micro-electro-mechanical system) micromachining techniques for optic-nerve visual prosthesis applications.Theoretical analyses of noise contributed to determining the size of the exposed recording sites of the microprobe.The geometry configuration was optimized for the silicon microprobe to have enough strength and flexibility and to reduce the insertion-induced tissue trauma.Impedance test results showed that the average value of the channels was 2.3MΩ at 1kHz when applied with a stimulating voltage with the amplitude of 50mVpp,which is suitable for neural signal recordings.In-vivo animal experiment showed that the recorded neural signal amplitude from the primary visual cortex was 8μV.

  • A Sacrificial Layer Etching Method Applied in Surface Micromachining Using Agitated BHF and Glycerol Solution

    Wang Xiaoning, Yang Zhenchuan, Yan Guizhen

    J. Semicond.  2008, 29(11): 2175

    Abstract PDF

    A modified buffered-HF solution with NH4F∶glycerol∶HF (4∶2∶1) is studied.With the implementation of a heating and agitating mechanism,this method is applied in a sacrificial layer etching scheme that increases the selectivity between silicon dioxide and aluminum.The etching rates of SiO2 and Al as a function of solution temperature are determined.Moreover,the effects of adding glycerol and agitating the etchant are examined and compared with this method.Finally,this method is tested on an actual device,and its efficiency is scrutinized.

  • Effect of Width Ratio on the Etching Behavior of Joint Channel Structure

    Wu Changju, Jin Zhonghe, Wang Yuelin

    J. Semicond.  2008, 29(11): 2180

    Abstract PDF

    Effect of width ratio on the etching behaviour of joint channel structure is studied.By theory and experiments,the etching behaviors of joint channel with different width ratios are compared.The results show that the effect of width ratio on the etching behavior is much different for the narrow-wide joint channel and the wide-narrow structure.For the narrow-wide joint channel,the etching process depends not only on the width ratio but also on the width of the channel.The etching rate and concentration of etching front at each stage are very close with the same width ratio.The etching time required at each stage increases with the channel width,but the final total etching time is very close if the length of the wide channel is much longer.For the wide-narrow joint channel,the etching process depends only on the width ratio.For wide-narrow joint channel,the etching process,including the required etching time,is absolutely the same with the same width ratio.The etching rate and concentration of etching front at each stage increases with the rise of the width ratio,while the total etching time decreases with the increase of width ratio.

  • Ohmic Contact Property of Ti/Al/Ni/Au on AlGaN/GaN Heterostructures for Application in Ultraviolet Detectors

    Zhang Junqin, Yang Yintang, Chai Changchun, Li Yuejin, Jia Hujun

    J. Semicond.  2008, 29(11): 2187

    Abstract PDF

    Ohmic contacts of Ti/Al/Ni/Au multi-layer metal on Al0.27Ga0.73N/GaN heterostructures were fabricated.Specific contact resistivities were measured by the linear transmission line method (LTLM) and the circular transmission line method (CTLM),respectively.A minimum specific contact resistivity of 1.46E-5Ω·cm2 was obtained by evaporating a Ti(10nm)/Al(100nm)/Ni(40nm)/Au(100nm) multi-layer and annealing for 30s at 650℃ in ultra-high purity N2 ambient.Al0.27Ga0.73N/GaN photoconductor ultraviolet (UV) photodetectors were prepared.The dark current-voltage (I-V) characteristics of the detectors were measured and the result shows that the I-V curve was linear.Experimental results indicate that good ohmic contact on the Al0.27Ga0.73N/GaN heterostructure is obtained and it can be applied in high-performance AlGaN/GaN UV photodetector fabrications.

  • Intensity Noise Suppression of an FP Laser by External Injection Locking

    Ren Min, Han Wei, Xie Liang, Chen Wei, Zhang Yan, Ju Yu, Zhang Hongguang, Zhang Banghong, Zhu Ninghua

    J. Semicond.  2008, 29(11): 2192

    Abstract PDF

    The optimal intensity noise suppression of a Fabry-Perot (FP) laser is experimentally acquired by relatively strong external optical injection locking technology.The maximum suppression is up to 9dB around the relaxation oscillation peak of the free running FP laser.We demonstrate how the injection light power and detuning frequency influence the intensity noise suppression effects.Additionally,the relationship between the optimal suppression range and the stable locking range is experimentally studied:both ranges enlarge as the injection light power increases,but the stable locking range permits larger detuning frequency at identical injection light power.

  • Design of a Polymer Directional Coupler Electro-Optic Switch with Low Push-Pull Switching Voltage at 1550nm

    Zheng Chuantao, Ma Chunsheng, Yan Xin, Wang Xianyin, Zhang Daming

    J. Semicond.  2008, 29(11): 2197

    Abstract PDF

    A polymer directional coupler (DC) electro-optic switch with push-pull electrodes and rib waveguides is designed based on the conformal transforming method,image method,coupled mode theory,and electro-optic modulation theory.Its structure and principle are described,the design and optimization are performed,and the characteristics are analyzed,including the coupling length,switching voltage,output power,insertion loss,and crosstalk.To realize normal switching function,the fabrication tolerance,wavelength shift,and coupling loss between a single mode fiber (SMF) and the waveguide are discussed.Simulation results show that the coupling length is 3082μm;the push-pull switching voltage is 2.14V;and the insertion loss and crosstalk are less than 1.14 and -30dB,respectively.The proposed analytical technique on waveguides and electrodes is proven to be accurate and computationally efficient when compared with the beam propagation method (BPM) and the experimental results.

  • A Fully-Integrated Dual Band CMOS Power Amplifier Based on an Active Matching Transformer

    Jin Boshi, Wu Qun, Yang Guohui, Meng Fanyi, Fu Jiahui

    J. Semicond.  2008, 29(11): 2204

    Abstract PDF

    We propose a dual band CMOS power amplifier for mobile WiMAX systems.The power amplifier,combined with an active matching transformer,is fully integrated and fabricated in a 0.13μm CMOS process.The transformer operates at dual bands with active matching circuit.The measured result shows that the transformer efficiency of 78.2% and 70.4% at 2.5 and 3.5GHz are realized,respectively,and 26.5 and 24.8dB gain are achieved.The PAE reaches 20% and 28% at 2.5 and 3.5GHz,respectively.The third inter-modulation (IM3) is lower than -30dBc at the 25dBm average power.

  • High-Consistency Behavior Modeling of a Switched-Capacitor Sigma-Delta Modulator in SIMULINK

    Ou Wei, Wu Xiaobo

    J. Semicond.  2008, 29(11): 2209

    Abstract PDF

    To improve the simulation accuracy of SIMULINK,a novel inclusive behavior model of an integrator is proposed that introduces the effects of different circuit nonidealities of a switched-capacitor sigma-delta modulator into SIMULIK simulation.The nonlinear DC gain and nonlinear settling process are introduced into the op-amp module.The signal-dependent charge injection and nonlinear resistance are introduced into the switch module.In addition,the noise source including flicker and thermal noise is introduced into system as an independent module.The novel model is verified by SIMULINK behavioral simulations.The results are compared with results from circuit level simulation in Cadence SPICE using TSMC 0.35μm mixed signal technology.It shows that the novel model succeeds in introducing the influences of the nonidealities into behavior simulation to more realistically describe the circuit performances and increase the accuracy of SIMULINK simulation.

  • Design of a Dedicated Reconfigurable Multiplier in an FPGA

    Yu Hongmin, Chen Stanley L, Liu Zhongli

    J. Semicond.  2008, 29(11): 2218

    Abstract PDF

    We design a reconfigurable pipelined multiplier embedded in an FPGA.This design is based on the modified Booth algorithm and performs 18×18 signed or 17×17 unsigned multiplication.We propose a novel method for circuit optimization to reduce the number of partial products.A new layout floorplan design of the multiplier block is reported to comply with the constraints imposed by the tile-based FPGA chip design.The multiplier can be configured as synchronous or asynchronous.Its operation can also be configured as pipelined for high-frequency operation.This design can be easily extended for different input and output bit-widths.We employ a novel carry look-ahead adder circuit to generate the final product.The transmission-gate logic is used for the low-level circuits throughout the entire multiplier for fast logic operations.The design of the multiplier block is based on SMIC 0.13μm CMOS technology using full-custom design methodology.The operation of the 18×18 multiplier takes 4.1ns.The two-stage pipelined operation cycle is 2.5ns.This is 29.1% faster than the commercial multiplier and is 17.5% faster than the multipliers reported in other academic designs.Compared with the distributed LUT-based multiplier,it demonstrates an area efficiency ratio of 33∶1.

  • Development and Analysis of an RF Film Bulk Acoustic Resonator

    Tang Liang, Li Junhong, Hao Zhenhong, Qiao Donghai

    J. Semicond.  2008, 29(11): 2226

    Abstract PDF

    A high-Q diaphragm-structure film bulk acoustic resonator (FBAR) with a flat support diaphragm,made of Si3N4/SiO2/Si3N4 composite films,is proposed.The N/O/N composite diaphragm overcomes the wrinkling in the released support diaphragm caused by the residual stress of a single Si3N4 or SiO2 diaphragm.ZnO piezoelectric film deposited employing a DC reactive magnetron sputtering method is used as the piezoelectric material for the FBAR device.The XRD θ-2θ scan indicates that the ZnO film has the preferred c-axis orientation growth,implying good piezoelectric properties.The S parameter measurement shows that there are three primary resonances in the frequency range from 0.4 to 2.6GHz.The series resonant frequency,parallel resonant frequency,K2eff,and quality factors of the three resonances are calculated.The third one,with a frequency of about 2.4GHz,has the highest quality factor about 500.Thus,it is expected to be a candidate to form a 2.4GHz low-phase-noise oscillator.

  • A 3V 5.88mW 13b 400kHz Sigma-Delta Modulator with 84dB Dynamic

    Li Zhuo, Yang Huazhong

    J. Semicond.  2008, 29(11): 2232

    Abstract PDF

    This paper introduces a high-revolution,200kHz signal bandwidth ΣΔ modulator for low-IF GSM receivers that adopts a 2-1 cascaded single-bit structure to achieve high linearity and stability.Our design is realized in a standard 0.18μm CMOS process with an active area of 0.5mm×1.1mm.The ΣΔ modulator is driven by a single 192MHz clock signal and dissipates 5.88mW from 3V power supply.The experimental results show that,with an oversampling ratio of 48,the modulator achieves a 84.4dB dynamic range,73.8dB peak SNDR,and 80dB peak SNR in the signal bandwidth of 200kHz.

  • Design of an Active-RC Low-Pass Filter with Accurate Tuning Architecture

    Chen Fangxiong, Lin Min, Chen Bei, Jia Hailong, Shi Yin, Dai Forster

    J. Semicond.  2008, 29(11): 2238

    Abstract PDF

    An active-RC low-pass filter of 5MHz cutoff frequency with a tuning architecture is proposed.It is implemented in 0.18μm standard CMOS technology.The accuracy of the tuning system is improved to be within (-1.24%,+2.16%) in measurement.The chip area of the tuning system is only a quarter of that of the main-filter.After tuning is completed,the tuning system will be turned off automatically to save power and to avoid interference.The in-band 3rd order harmonic input intercept point (IIP3) is larger than 16.1dBm,with 50Ω as the source impedance.The input referred noise is about 36μVrms.The measured group delay variation of the filter between 3 and 5MHz is only 24ns,and the filter power consumption is 3.6mW.This filter with the tuning system is realized easily and can be used in many wireless low-IF receiver applications,such as global position systems (GPS),global system for mobile communications (GSM) and code division multiple access (CDMA) chips.

  • An Integrated Power Management Unit for a Battery-Operated Wireless Endoscopic System

    Chen Xinkai, Jiang Hanjun, Wang Zhihua

    J. Semicond.  2008, 29(11): 2245

    Abstract PDF

    This paper presents an integrated power management unit (PMU) for a battery-operated wireless endoscopic system.This PMU is integrated with a baseband chip in standard 0.18μm CMOS technology,promising low cost,ease in PCB design,and a minimum in system size.The optimized power supply architecture is derived from comparison.Circuits of sub blocks are presented in detail.As a result,only five small off-chip capacitances are required by PMU with an overall quiet current consumption of less than 100μA.Moreover,a digital calibration method is adopted to alleviate the effect of process variation.The achieved performance is also demonstrated with corresponding measurement results.

  • Exciton Recombination in the Coupling Structure of a ZnCdSe Quantum Well and CdSe Quantum Dots

    Jin Hua, Bu Fanliang, Li Lihua, Wang Rong, Zhang Zhenzhong, Zhang Ligong, Zheng Zhuhong, Shen Dezhen

    J. Semicond.  2008, 29(11): 2252

    Abstract PDF

    Coupling structures for a ZnCdSe quantum well and CdSe quantum dots (QDs) with different thickness of barrier layer were fabricated by metal organic chemical vapor deposition (MOCVD).The recombination and tunneling of excitons in the ZnCdSe QW/CdSe QDs structure were investigated using photoluminescence (PL) spectra at 5K.The tunneling process of the exciton from QW to QDs was observed.The excitation light power dependence of PL peak position and PL-integrated intensity were also investigated,respectively.The results reveal that in this structure with thinner barrier layer,the absorption saturation in ZnCdSe quantum well can be restrained.

  • Room Temperature Ferromagnetism in Nanostructure Cu-Doped ZnO

    Liu Huilian, Yang Jinghai, Zhang Yongjun, Wang Yaxin, Wei Maobin, Zhao Liyou

    J. Semicond.  2008, 29(11): 2256

    Abstract PDF

    A series of Zn1-xCuxO(x=0.01,0.02,0.03,0.04) nanoparticles were synthesized from Zn nitrate and Cu nitrate reduced by citrate.X-ray diffraction (XRD) shows that Zn1-xCuxO samples are single phase with ZnO-like wurtzite structure.Magnetic measurements indicate that Zn1-xCuxO(x=0.01,0.02,0.03,0.04) are ferromagnetic at room temperature.XRD,transmission electron microscope (TEM) analysis,and X-ray photoelectron spectroscopy (XPS) reveal that no ferromagnetic-related secondary phase was detected.The ferromagnetism in Zn1-xCuxO (x≤0.04) is intrinsic.

  • Photoluminescence Properties of ZnO Nanorods Prepared Under Low Temperature

    Lang Jihui, Yang Jinghai, Li Changsheng, Han Qiang, Yang Lili, Wang Dandan, Gao Ming, Liu Xiaoyan

    J. Semicond.  2008, 29(11): 2260

    Abstract PDF

    Zinc oxide (ZnO) nanorods are grown on ITO conducting glass with the chemical bath deposition (CBD) method.XRD,SEM,and PL are used to characterize the crystal structures,surface morphologies,and photoluminescence properties of ZnO nanorods.The X-ray measurement results show that the growth orientation of the as-prepared ZnO nanorods is (002).The SEM results show that the size of ZnO nanorods increases with the molar concentration of zinc nitrate,and the diameter and length of nanorods increases significantly through tuning the reaction time when the molar concentration is 0.1M.The photoluminescence measurements show that the all the samples have good photoluminescence behaviors.The crystallization of the samples increases with the molar concentration of zinc nitrate and the reaction time.

  • Thermal Sensitive Characteristics of Phosphor-Doped Hydrogenated Amorphous Silicon by PECVD

    Ma Tieying, Li Tie, Liu Wenping, Wang Yuelin

    J. Semicond.  2008, 29(11): 2265

    Abstract PDF

    A hydrogenated amorphous silicon of different phosphor doping concentrations is fabricated by PECVD.FTIR spectra and TCR of a-Si:H are obtained after annealing at different temperatures and times.The structure and bonding of the film are decided by different annealing conditions,leading to the change in the thermal and electric characteristics.Lu’s model is used to explain the phenomena,and an optimum preparation is attained with a doping ratio of 0.025 and an annealing temperature of 600℃.

  • A VBIC Model with Voltage-Dependent Carrier Velocity and Depletion-Layer Thickness

    Ge Ji, Jin Zhi, Liu Xinyu, Cheng Wei, Wang Xiantai, Chen Gaopeng, Wu Dexin

    J. Semicond.  2008, 29(11): 2270

    Abstract PDF

    The voltage-dependent carrier velocity and the depletion-layer thickness in the collector of a GaAs-based HBT have been investigated.The formulation of the voltage-dependent collector transit time has been established.An improved vertical bipolar inter-company (VBIC) model with the collector transit time has been developed.The model more accurately predicts S-parameters over a wide range of the bias voltage than the VBIC model.

  • A CMOS Flyback PWM Controller with Low No-Load Power Consumption

    Zhu Zhangming, Yang Yintang

    J. Semicond.  2008, 29(11): 2275

    Abstract PDF

    Based on the SinoMOS 1μm 40V CMOS process,a CMOS flyback PWM controller with low power consumption is presented.The flyback PWM controller provides frequency conversion-mode under the light-load condition and burst-mode under the zero-load condition,which minimize standby power consumption and enable the power supply to meet international power conservation requirements.The PWM frequency of the flyback PWM controller is 65~66kHz with a normal load and 21.7kHz with no or light load.The start operation current is 17~18μA,and the normal operation current is 3.5~4.0mA.The active die area of the flyback PWM controller is 2.06mm×1.55mm.

  • A Ku Band 30W Pulsed Microwave Power Amplifier Module

    Chen Gaopeng, Chen Xiaojuan, Liu Xinyu, Li Bin

    J. Semicond.  2008, 29(11): 2281

    Abstract PDF

    This paper reports the design and performance of a pulsed microwave power amplifier module that uses microstrip lines and five-stage solid-state devices.A novel two-layer chamber structure is designed for the cancellation of crosstalk between low-frequency circuits and high-frequency circuits.A two-section bias circuit for the GaAs internally matched MESFETs is presented,with which the low-frequency oscillations can be suppressed effectively.When operating over 13.5~14.0GHz at a duty cycle of 10% with 3kHz pulse repetition frequency,the power amplifier module shows a power gain of Gp≥44dB,an output pulsed peak power of Ppk≥30W,and a total efficiency of η≥13% (class A power amplification).

  • Fabrication of InAsP/InGaAsP Quantum-Well 1.3μm VCSELsby Direct Wafer-Bonding

    Lao Yanfeng, Cao Chunfang, Wu Huizhen, Cao Meng, Liu Cheng, Xie Zhengsheng, Gong Qian

    J. Semicond.  2008, 29(11): 2286

    Abstract PDF

    We designed and fabricated a vertical-cavity surface-emitting laser (VCSEL) that consisted of an InP-based active layer with InAsP/InGaAsP strain-compensated multi-quantum wells,SiO2/TiO2 dielectric film,and GaAs/AlAs semiconductor distributed Bragg reflectors (DBRs).The InP-based active layers and GaAs-based DBRs were integrated using wafer-direct bonding techniques.Then,devices were successfully fabricated upon related device processing such as current-aperture definition using wet-etching undercut techniques and deposition of dielectric DBR,etc.The threshold current of the VCSEL is 13.5mA and the wavelength of the single mode is 1288.6nm.


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